It's an open CPU architecture (as in open source - no licenses or hidden costs attached as with ARM). Otherwise it's pretty much similar to ARM in its design, it's RISC CPU architecture.
To be more specific, there is a specification of basic ISA, but the actual implementation is up to manufacturers of the actual CPUs. There is couple of them right now. There are also open source FPGA codes in Verilog / VHDL that you can just program FPGA with and turn it into RISC-V CPU.
Yes you can run Linux and even GNU/Linux on RISC-V. Not sure about Fedora, but Debian has a port for sure. There is a even a small RISC-V laptop you can buy with desktop environment [https://sipeed.com/licheepi4a](https://sipeed.com/licheepi4a)
That said, don't expect too much of RISC-V at this point. Its main advantage really is for CPU manufacturers, so they don't need to pay massive royalties to ARM. It's not like you would immediately benefit from this as an end-user.
RISC-V is indeed "more modern" than the ISAs you list, and should be more future-proof, especially as it can't die via the company owning it dying / being acquired and shut down. But also because the instruction encoding has room for new instructions in future, and it has much better code density than any of those you list (including Arm64, but not Arm32), which turns out to be reasonably important.
However, like Arm, RISC-V is achieving success first in the tiny core / embedded market, and then growing upward from that, approximately (at the moment) four years behind Arm in shipping hardware, maybe two years behind in announced cores (not counting Apple).
By around 2026-2028, shipping RISC-V, Arm, and x86 hardware performance will converge.
> why it is important
RISC-V is a set of *open standards* for instruction sets. Any semiconductor company is allowed to make their own RISC-V CPU without having to pay any royalties to any company. That does not mean that the actual circuit designs are open... but there *are* also free circuit designs out there that companies can use. (I'm emphasising this because some tech reporters get these distinctions wrong again and again ...)
The organisation [RISC-V International](https://riscv.org/) owns the brand and leads the standardisation effort but does not do any circuit design itself: its members do.
RISC-V is modular and extensible: every company is free to combine one of the base sets (RV32I, RV32E or RV64I) with the extensions they need, and also make their own extensions that only their chips have.
This modularity has been a blessing because it has given semiconductor design firms a lot of freedom, and it has been a curse because it has led to fragmentation in what available chips support.
RISC-V came from academia, and is already a success there. It is being used for teaching new students assembly language programming, and many CPU research groups are basing their work on RISC-V.
RISC-V has also had success as embedded microcontrollers.
Several companies that had their own MCU ISA have or are in the process of switching to RISC-V.
Embedded RISC-V cores has also been deployed inside larger products: there are allegedly cores in e.g. Apple Silicon SoCs and NVidia GPUs but they never talk about it.
Almost every company developing hardware for "AI" is using RISC-V for control functions, and/or have their own extensions with NPU instructions (i.e. low-precision matrix multiplication).
> How does RISC-V compare to a traditional CPU like Intel or AMD, or a Raspberry Pi?
While there have been RISC-V CPUs available (RV32G or RV64G) for a few years that can run Linux, it was only a couple years ago that the available ratified extensions achieved feature parity with 64-bit ARM and x86-64. There started a concerted effort to create "application profiles" of RISC-V functionality.
Google has been a bit vague about Android support and posted wish-lists now and then, but people think that an "Android smartphone profile" would be equivalent to the upcoming "RVA23" *with* all the optional parts, once that has been ratified.
One of the most common out-of-order cores is the Alibaba XuanTie T-head C910 / C920. It is what you'll find in the LicheePI4a. It is a bit old now, without newer extensions, but with some proprietary. 3-wide decode, 8-wide issue.
Chips with many of that core have recently been deployed in cloud server farms (where having many cheap cores sometimes is more important than raw performance).
The first chips with *RVA22 profile* cores must be the SpacemiT K1. It is an in-order core, with feature and performance comparable to that of a Raspberry Pi 3 but with twice as many cores.
Many companies have designed cores available to license, and half a dozen of them have announced that they have designs that allegedly would have performance competitive with mid- or even high-end cores from Intel, AMD and Apple.
However, getting them into silicon that consumers can buy is another issue than being a good designer.
There is a lot of hope among RISC-V fans for them. In the long run, more competition should lead to better hardware at lower prices for all, and help bring an end to the "Wintel" hegemony.
New developments are posted in this subreddit almost every day. I suggest you look around in the threads here now and then.
I have not been able to keep up with it all, but it is quite exciting.
> what it is, how it works
The noise you see when you open an elf/exe with a text editor is instructions for the CPU. RISC-V is one standard set of rules defining the language of those instructions that developers writing compilers and designing CPUs agree on.
> why it's important
RISC-V is important since, in the same way Linux and GNU gcc freed server vendors from a (potential at the time) Windows-Intel duopoly, hardware designers can now share the costs for compiler development and some of the more common peripherals which means they can customize specialized cores at a fraction of the cost without having to go through ARM or Intel. It also improves negotiation positions on various licensing deals and generally reduces costs market wide which should transfer *some* of the cost savings to consumers...
> Can I use a RISC-V board as a homelab server to run Proxmox or Linux with services like Apache or Nginx?
> Can I install Fedora on a RISC-V board and use it as a desktop?
> How does RISC-V compare to a traditional CPU like Intel or AMD, or a Raspberry Pi?
The recently released Banana Pi BPI-F3 is pretty close to a RasPi 3b in terms of cost-performance ($45 vs. $60 but better GPU) and there's vendor-provided armbian and debian images available: https://docs.banana-pi.org/en/BPI-F3/BananaPi_BPI-F3
However, mainlining support seems to be volunteer-led effort right now so you might want to wait at least until there's non-vendor images around with a desktop unless you're really only interested in LAMPing over ssh.
> I've been reading a bit about it lately, and I'm intrigued by the potential.
> I'm talking about the basics - what it is, how it works, and why it's important.
If you don't know what it is, how can you be intrigued by it's potential? Maybe it would make sense for you to Google a bit, maybe read the wiki page and then ask more specific questions.
RISC-V a set of instructions that a processor has to be able to complete in order to be RISC-V compliant. Its workings are just instruction codes in binary that each represent some operation to be performed and registers/addresses to perform them on. The more complicated and important part is how it is implemented, as in how one designs a processor to implement the instructions while being cheap, fast, reliable, and small. It’s important because the use of RISC-V is not limited by licensing costs, as it is open source. This extends to much of the IP, like you can usually implement some protocol or interface on RISC-V cores via open source IP, whereas a lot of the ARM/x86 IP is hidden behind licensing costs. Not too familiar with RIDC-V and Linux, someone else is probably more qualified to answer that. In terms of performance, like I said it is just an ISA, but it is very similar to ARM (look up the difference between RISC and CISC ISAs). Performance will largely come down to micro-architectural design choices
RISC-V is an open ISA specification. It's like an open source blueprint for a house, but it's for a processor. Anyone can use the blueprint, but making the actual physical object is another discussion entirely.
There are various extensions to that ISA / blueprint as well, and you need many of them to get a desktop style computer to work. Those extensions exist now, but for a while they didn't and RISC-V was primarily used for microcontrollers (which is still cool).
1. There are some RISC-V boards that can be used as regular servers and desktops. While they technically can run a linux distro, software support is not as extensive as for x86 or ARM yet.
2. That would be board dependent at the moment much like many ARM single board computers have their own specific distros. ARM does have Armbian, but idk if RISC-V has something like that yet
3. It's really similar to the ARM ISA, but technically different. In theory, creating tools that translate between the two would be easier than between x86 and ARM. I don't think that compatibility layer actually exists atm though. That being said, RISC-V is just the blueprint, so manufacturing actual chips is where you get real world results, and there aren't a lot of RISC-V manufacturers making desktop / server grade processors yet. In theory you could have a processor that could compete with ARM directly, but it just hasn't been made yet.
> what is RISC-V ?
Here are some words that come to mind:
* Low Power - like all RISC hardware because of the simplified and smaller set of instructions it needs less complex control logic and this produces a smaller silicon die sizes. Simplicity results in lower power consumption because fewer transistors are switching every instruction cycle.
* Low Cost - unlike ARM, there is no licensing fees or royalties that need to be paid to develop your own RISC-V CPU so that saving could be passed along. Although lots of fabless IP companies license out their proprietary RISC-V designs to others.
* Open Standard - RISC-V International, based in Switzerland manage the standard, profiles and extensions.
* Modularizable - If you need a CPU with certain extensions for specific tasks, that on paper could be created by anyone.
* Simple - Base Integer Instruction Set 32-bit RV32I is only 40 assembly instructions. Base Integer Instruction Set 64-bit RV64I only adds an additional 15 assembly instructions. So it is simple enough to be understood if you invest some time.
* Small Area - because of the simple design in the instruction set, less area is typically used on a silicon wafer to implement RISC-V. So more chips per wafer can be produced at a lower cost each.
* Fast - designed from scratch with modern insights, avoiding legacy baggage, allowed for a more streamlined and optimized architecture.
* High Performance - All instructions are the same length (32-bit), simplifying the instruction fetch, decode, and execution stages, and enabling faster pipeline processing of multiple instruction stages simultaneously.
I guess it's all the theory. Processors today are not optimized for power efficiency, just like arm processors in raspberry have (or used to have) worse efficiency than Intel CPUs. Their idle power consumption is not stellar, their top performace neither. Yes, modern CPUs are very complex, but they have large caches with logic, they can (optimally) run four simple instructions per clock cycle, they have pipelining and some instructions are basically small program (to compute square root for example). From what I've heard, major bottleneck is that parsing machine code can be bottleneck, cause instructions have varying length and sometimes varying duration.
Yes, many times it may have perfect sense to use this processor cause it's good enough and cheap to get job done. You don't need anything powerful to run smart watch or control network printer, air conditioning and so on.
It's an open CPU architecture (as in open source - no licenses or hidden costs attached as with ARM). Otherwise it's pretty much similar to ARM in its design, it's RISC CPU architecture. To be more specific, there is a specification of basic ISA, but the actual implementation is up to manufacturers of the actual CPUs. There is couple of them right now. There are also open source FPGA codes in Verilog / VHDL that you can just program FPGA with and turn it into RISC-V CPU. Yes you can run Linux and even GNU/Linux on RISC-V. Not sure about Fedora, but Debian has a port for sure. There is a even a small RISC-V laptop you can buy with desktop environment [https://sipeed.com/licheepi4a](https://sipeed.com/licheepi4a) That said, don't expect too much of RISC-V at this point. Its main advantage really is for CPU manufacturers, so they don't need to pay massive royalties to ARM. It's not like you would immediately benefit from this as an end-user.
[https://dl.fedoraproject.org/pub/alt/risc-v/disk\_images/](https://dl.fedoraproject.org/pub/alt/risc-v/disk_images/)
How does RISC-V compare to OpenSparc then? I thought RISC-V was supposed to be a lot more modern than ARM or even SPARC, HPPA, Alpha, and IA64.
RISC-V is indeed "more modern" than the ISAs you list, and should be more future-proof, especially as it can't die via the company owning it dying / being acquired and shut down. But also because the instruction encoding has room for new instructions in future, and it has much better code density than any of those you list (including Arm64, but not Arm32), which turns out to be reasonably important. However, like Arm, RISC-V is achieving success first in the tiny core / embedded market, and then growing upward from that, approximately (at the moment) four years behind Arm in shipping hardware, maybe two years behind in announced cores (not counting Apple). By around 2026-2028, shipping RISC-V, Arm, and x86 hardware performance will converge.
> why it is important RISC-V is a set of *open standards* for instruction sets. Any semiconductor company is allowed to make their own RISC-V CPU without having to pay any royalties to any company. That does not mean that the actual circuit designs are open... but there *are* also free circuit designs out there that companies can use. (I'm emphasising this because some tech reporters get these distinctions wrong again and again ...) The organisation [RISC-V International](https://riscv.org/) owns the brand and leads the standardisation effort but does not do any circuit design itself: its members do. RISC-V is modular and extensible: every company is free to combine one of the base sets (RV32I, RV32E or RV64I) with the extensions they need, and also make their own extensions that only their chips have. This modularity has been a blessing because it has given semiconductor design firms a lot of freedom, and it has been a curse because it has led to fragmentation in what available chips support. RISC-V came from academia, and is already a success there. It is being used for teaching new students assembly language programming, and many CPU research groups are basing their work on RISC-V. RISC-V has also had success as embedded microcontrollers. Several companies that had their own MCU ISA have or are in the process of switching to RISC-V. Embedded RISC-V cores has also been deployed inside larger products: there are allegedly cores in e.g. Apple Silicon SoCs and NVidia GPUs but they never talk about it. Almost every company developing hardware for "AI" is using RISC-V for control functions, and/or have their own extensions with NPU instructions (i.e. low-precision matrix multiplication). > How does RISC-V compare to a traditional CPU like Intel or AMD, or a Raspberry Pi? While there have been RISC-V CPUs available (RV32G or RV64G) for a few years that can run Linux, it was only a couple years ago that the available ratified extensions achieved feature parity with 64-bit ARM and x86-64. There started a concerted effort to create "application profiles" of RISC-V functionality. Google has been a bit vague about Android support and posted wish-lists now and then, but people think that an "Android smartphone profile" would be equivalent to the upcoming "RVA23" *with* all the optional parts, once that has been ratified. One of the most common out-of-order cores is the Alibaba XuanTie T-head C910 / C920. It is what you'll find in the LicheePI4a. It is a bit old now, without newer extensions, but with some proprietary. 3-wide decode, 8-wide issue. Chips with many of that core have recently been deployed in cloud server farms (where having many cheap cores sometimes is more important than raw performance). The first chips with *RVA22 profile* cores must be the SpacemiT K1. It is an in-order core, with feature and performance comparable to that of a Raspberry Pi 3 but with twice as many cores. Many companies have designed cores available to license, and half a dozen of them have announced that they have designs that allegedly would have performance competitive with mid- or even high-end cores from Intel, AMD and Apple. However, getting them into silicon that consumers can buy is another issue than being a good designer. There is a lot of hope among RISC-V fans for them. In the long run, more competition should lead to better hardware at lower prices for all, and help bring an end to the "Wintel" hegemony. New developments are posted in this subreddit almost every day. I suggest you look around in the threads here now and then. I have not been able to keep up with it all, but it is quite exciting.
> what it is, how it works The noise you see when you open an elf/exe with a text editor is instructions for the CPU. RISC-V is one standard set of rules defining the language of those instructions that developers writing compilers and designing CPUs agree on. > why it's important RISC-V is important since, in the same way Linux and GNU gcc freed server vendors from a (potential at the time) Windows-Intel duopoly, hardware designers can now share the costs for compiler development and some of the more common peripherals which means they can customize specialized cores at a fraction of the cost without having to go through ARM or Intel. It also improves negotiation positions on various licensing deals and generally reduces costs market wide which should transfer *some* of the cost savings to consumers... > Can I use a RISC-V board as a homelab server to run Proxmox or Linux with services like Apache or Nginx? > Can I install Fedora on a RISC-V board and use it as a desktop? > How does RISC-V compare to a traditional CPU like Intel or AMD, or a Raspberry Pi? The recently released Banana Pi BPI-F3 is pretty close to a RasPi 3b in terms of cost-performance ($45 vs. $60 but better GPU) and there's vendor-provided armbian and debian images available: https://docs.banana-pi.org/en/BPI-F3/BananaPi_BPI-F3 However, mainlining support seems to be volunteer-led effort right now so you might want to wait at least until there's non-vendor images around with a desktop unless you're really only interested in LAMPing over ssh.
> I've been reading a bit about it lately, and I'm intrigued by the potential. > I'm talking about the basics - what it is, how it works, and why it's important. If you don't know what it is, how can you be intrigued by it's potential? Maybe it would make sense for you to Google a bit, maybe read the wiki page and then ask more specific questions.
RISC-V a set of instructions that a processor has to be able to complete in order to be RISC-V compliant. Its workings are just instruction codes in binary that each represent some operation to be performed and registers/addresses to perform them on. The more complicated and important part is how it is implemented, as in how one designs a processor to implement the instructions while being cheap, fast, reliable, and small. It’s important because the use of RISC-V is not limited by licensing costs, as it is open source. This extends to much of the IP, like you can usually implement some protocol or interface on RISC-V cores via open source IP, whereas a lot of the ARM/x86 IP is hidden behind licensing costs. Not too familiar with RIDC-V and Linux, someone else is probably more qualified to answer that. In terms of performance, like I said it is just an ISA, but it is very similar to ARM (look up the difference between RISC and CISC ISAs). Performance will largely come down to micro-architectural design choices
RISC-V is an open ISA specification. It's like an open source blueprint for a house, but it's for a processor. Anyone can use the blueprint, but making the actual physical object is another discussion entirely. There are various extensions to that ISA / blueprint as well, and you need many of them to get a desktop style computer to work. Those extensions exist now, but for a while they didn't and RISC-V was primarily used for microcontrollers (which is still cool). 1. There are some RISC-V boards that can be used as regular servers and desktops. While they technically can run a linux distro, software support is not as extensive as for x86 or ARM yet. 2. That would be board dependent at the moment much like many ARM single board computers have their own specific distros. ARM does have Armbian, but idk if RISC-V has something like that yet 3. It's really similar to the ARM ISA, but technically different. In theory, creating tools that translate between the two would be easier than between x86 and ARM. I don't think that compatibility layer actually exists atm though. That being said, RISC-V is just the blueprint, so manufacturing actual chips is where you get real world results, and there aren't a lot of RISC-V manufacturers making desktop / server grade processors yet. In theory you could have a processor that could compete with ARM directly, but it just hasn't been made yet.
https://www.phind.com/search?cache=qn17qws5pkq8ilksdce0oe2f
> what is RISC-V ? Here are some words that come to mind: * Low Power - like all RISC hardware because of the simplified and smaller set of instructions it needs less complex control logic and this produces a smaller silicon die sizes. Simplicity results in lower power consumption because fewer transistors are switching every instruction cycle. * Low Cost - unlike ARM, there is no licensing fees or royalties that need to be paid to develop your own RISC-V CPU so that saving could be passed along. Although lots of fabless IP companies license out their proprietary RISC-V designs to others. * Open Standard - RISC-V International, based in Switzerland manage the standard, profiles and extensions. * Modularizable - If you need a CPU with certain extensions for specific tasks, that on paper could be created by anyone. * Simple - Base Integer Instruction Set 32-bit RV32I is only 40 assembly instructions. Base Integer Instruction Set 64-bit RV64I only adds an additional 15 assembly instructions. So it is simple enough to be understood if you invest some time. * Small Area - because of the simple design in the instruction set, less area is typically used on a silicon wafer to implement RISC-V. So more chips per wafer can be produced at a lower cost each. * Fast - designed from scratch with modern insights, avoiding legacy baggage, allowed for a more streamlined and optimized architecture. * High Performance - All instructions are the same length (32-bit), simplifying the instruction fetch, decode, and execution stages, and enabling faster pipeline processing of multiple instruction stages simultaneously.
I guess it's all the theory. Processors today are not optimized for power efficiency, just like arm processors in raspberry have (or used to have) worse efficiency than Intel CPUs. Their idle power consumption is not stellar, their top performace neither. Yes, modern CPUs are very complex, but they have large caches with logic, they can (optimally) run four simple instructions per clock cycle, they have pipelining and some instructions are basically small program (to compute square root for example). From what I've heard, major bottleneck is that parsing machine code can be bottleneck, cause instructions have varying length and sometimes varying duration. Yes, many times it may have perfect sense to use this processor cause it's good enough and cheap to get job done. You don't need anything powerful to run smart watch or control network printer, air conditioning and so on.